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31.
Novel III-V device architectures for application in advance CMOS logic and beyond
by Hui, Goh Kian, Ph.D.  National University of Singapore (Singapore). 2015: 185 pages; 10006003.
32.
On-Chip Diagnosis of Generalized Delay Failures using Compact Fault Dictionaries
by Beckler, Matthew Layne, Ph.D.  Carnegie Mellon University. 2017: 132 pages; 10283822.
33.
Single-chip integration of a three-dimensional imaging system
by Philipp, Ralf M., Ph.D.  The Johns Hopkins University. 2008: 227 pages; 3339884.
34.
Acceleration of streaming applications on FPGAs from high level constructs
by Mitra, Abhishek, Ph.D.  University of California, Riverside. 2008: 192 pages; 3341851.
35.
Complexity and power consumption in stochastic iterative decoders
by Payak, Keyur M., M.S.  Utah State University. 2010: 52 pages; 1483787.
36.
An optimized modified booth recoder for efficient design of the add-multiply operator
by Mehta, Kunal, M.S.  California State University, Long Beach. 2015: 35 pages; 1603343.
37.
Decoupled Vector-Fetch Architecture with a Scalarizing Compiler
by Lee, Yunsup, Ph.D.  University of California, Berkeley. 2016: 157 pages; 10151006.
38.
Design and Verification of a DFI-AXI DDR4 Memory PHY Bridge Suitable for FPGA Based RTL Emulation and Prototyping
by Mayekar, Pallavi Avinash, M.S.  Rochester Institute of Technology. 2019: 122 pages; 22615759.
39.
Demonstrating the role of multiple memory mechanisms in learning patterns using neuromorphic circuits
by Barzegarjalali, Saeid, Ph.D.  University of Southern California. 2016: 141 pages; 10242347.
40.
Design and Evaluation of Circuits and Architectures Based on Beyond-CMOS Device Technologies
by Palit, Indranil, Ph.D.  University of Notre Dame. 2017: 131 pages; 13836459.
41.
Computation of evolutionary change
by Stanek, Edward Jason, Ph.D.  Iowa State University. 2009: 95 pages; 3352259.
42.
Self assembled structures for 3D integration
by Rao, Madhav, Ph.D.  The University of Alabama. 2012: 140 pages; 3511075.
43.
Design and analysis of a Multi-Bit Flip-Flop
by Reddy, Hemashekar C., M.S.  California State University, Long Beach. 2016: 35 pages; 10140479.
44.
64-bit high efficiency binary comparator in quantum-dot cellular automata
by Patalay, Dinkar, M.S.  California State University, Long Beach. 2016: 49 pages; 10111200.
46.
Research and design on phase-locked loop and equalizer for wireline communications
by You, Yang, Ph.D.  Southern Methodist University. 2015: 170 pages; 3702841.
47.
48.
49.
Power and thermal modeling for the proto-VIPRAM chip
by Xia, Wenbo, M.S.  Southern Methodist University. 2014: 113 pages; 1569659.
50.
Auxiliary Roles in STT-MRAM Memory
by Das, Jayita, Ph.D.  University of South Florida. 2014: 122 pages; 3666526.
51.
Enhancing silicon debug techniques via DFD hardware insertion
by Yang, Joon Sung, Ph.D.  The University of Texas at Austin. 2009: 118 pages; 3372679.
52.
The semiconductor industry and emerging technologies: A study using a modified Delphi method
by Jordan, Edgar A., D.B.A.  University of Phoenix. 2010: 183 pages; 3442759.
53.
Reliability-Aware Placement and Routing for FPGAs
by Abdul-Aziz, Mohammed A., M.S.  Northeastern University. 2010: 94 pages; 1489294.
55.
Mixed-Signal Sensing, Estimation and Control for Miniature Robots
by Kuhlman, Michael Joseph, M.S.  University of Maryland, College Park. 2012: 131 pages; 1541601.
56.
Ultra-Low Power RFIC for Space/Medical/Mobile Applications
by Yasami, Saeid, Ph.D.  University of Louisiana at Lafayette. 2015: 114 pages; 10003754.
57.
Polymorphic chip multiprocessor architecture
by Solomatnikov, Alexandre, Ph.D.  Stanford University. 2009: 167 pages; 3343960.
58.
Reliable computing at the nanoscale
by Rachlin, Eric, Ph.D.  Brown University. 2010: 253 pages; 3430210.
59.
Modulo Multipliers with Adaptive Delay for a High Dynamic Range Residue Number System Using Booth Encoding
by Reddy, Ginni Sumanth, M.S.  California State University, Long Beach. 2017: 47 pages; 10263534.
60.
Silicon Compilation and Test for Dataflow Implementations in GasP and Click
by Mettala Gilla, Swetha, Ph.D.  Portland State University. 2018: 421 pages; 10686500.
31 - 60 of 307 displayed.
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