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1.
Productive Design of Extensible On-Chip Memory Hierarchies
by Cook, Henry Michael, Ph.D.  University of California, Berkeley. 2016: 153 pages; 10150942.
2.
Decoupled Vector-Fetch Architecture with a Scalarizing Compiler
by Lee, Yunsup, Ph.D.  University of California, Berkeley. 2016: 157 pages; 10151006.
3.
Design for Competitive Automated Layout (DCAL) of Superscalar Processors
by Ku, Sungkwan, Ph.D.  North Carolina State University. 2017: 106 pages; 10970028.
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