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1.
Yield, Cost, Reliability, and Availability of Multi-Core System-on-Chips
by Shamshiri, Saeed, Ph.D.  University of California, Santa Barbara. 2011: 178 pages; 3473795.
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Antikernel: A decentralized secure hardware-software operating system architecture
by Zonenberg, Andrew D., Ph.D.  Rensselaer Polytechnic Institute. 2015: 148 pages; 3705663.
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Network-on-chip based h.264 video decoder on a field programmable gate array
by Barge, Ian J., M.S.  Marquette University. 2017: 78 pages; 10266086.
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Optimizing Network-on-Chip Designs for Heterogeneous Many-Core Architectures
by Le, Tung Thanh, Ph.D.  University of Louisiana at Lafayette. 2018: 97 pages; 10981900.
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Reduction of energy consumption on Network-On-Chip using a data encoding technique
by Gadde, Virinchi, M.S.  California State University, Long Beach. 2016: 43 pages; 10099873.
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Computation and Communication Optimization in Many-Core Heterogeneous Server-on-Chip
by Reza, Md Farhadur, Ph.D.  University of Louisiana at Lafayette. 2017: 154 pages; 10687409.
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Combinatorial Neural Network Training Algorithm for Neuromorphic Computing
by Date, Prasanna, Ph.D.  Rensselaer Polytechnic Institute. 2019: 133 pages; 22583141.
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A study on the feasibility of universal chip control in machining
by Kumbera Ganapathi, Thimmaiah, Ph.D.  Michigan Technological University. 2011: 241 pages; 3454088.
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Design and Analysis of Large Scale Nanophotonic On-Chip Networks
by Nitta, Christopher, Ph.D.  University of California, Davis. 2011: 141 pages; 3499474.
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Chip -based detection of protein cancer markers
by Goluch, Edgar D., Ph.D.  University of Illinois at Urbana-Champaign. 2007: 127 pages; 3301266.
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On-chip demonstration of carbon nanotube interconnects
by Close, Gael F., Ph.D.  Stanford University. 2008: 134 pages; 3313812.
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Contention Alleviation in Network-on-Chips
by Xiang, Xiyue, Ph.D.  University of Louisiana at Lafayette. 2017: 115 pages; 10272587.
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Performance-Driven Hierarchical Design and Management of Networks-on-Chip in Many-Core System
by Bai, Mingmin, Ph.D.  University of Louisiana at Lafayette. 2018: 81 pages; 13420526.
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A Smart Design Framework for a Novel Reconfigurable Multi-Processor Systems-on-Chip (ASREM) Architecture
by Dutta, Anandi, Ph.D.  University of Louisiana at Lafayette. 2016: 127 pages; 10163349.
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Performance-Driven Communication Architecture Design in Irregular, Overlaid and Hybrid Mesh Wireless NoC
by Wu, Ruizhe, Ph.D.  University of Louisiana at Lafayette. 2014: 108 pages; 3622964.
21.
The mechanisms responsible for the genomic recruitment of E2F1
by Cao, Alina Rabinovich, Ph.D.  University of California, Davis. 2010: 215 pages; 3427480.
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On-Chip Diagnosis of Generalized Delay Failures using Compact Fault Dictionaries
by Beckler, Matthew Layne, Ph.D.  Carnegie Mellon University. 2017: 132 pages; 10283822.
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A microfluidic programmable array for label-free detection of biomolecules
by Dykstra, Peter Hume, Ph.D.  University of Maryland, College Park. 2011: 194 pages; 3478935.
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Optimization of Heterogeneous NoC for Fused CPU-GPU Architecture
by Alhubail, Lulwah, Ph.D.  University of California, Irvine. 2019: 127 pages; 13886231.
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Securing the use of sensitive data on remote devices using a hardware-software architecture
by Dwoskin, Jeffrey Scott, Ph.D.  Princeton University. 2010: 249 pages; 3410991.
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Productive Design of Extensible On-Chip Memory Hierarchies
by Cook, Henry Michael, Ph.D.  University of California, Berkeley. 2016: 153 pages; 10150942.
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System on chip: Two design paths explained
by Tamayo, Jose, M.S.  California State University, Long Beach. 2012: 99 pages; 1520930.
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Social network analysis: Determining betweenness centrality of a network using Ant Colony Optimization
by Rubano, Vincent, M.S.  Southern Connecticut State University. 2016: 117 pages; 10108549.
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