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31.
Methods for performance optimization of latency-insensitive systems
by Li, Cheng-Hong, Ph.D.  Columbia University. 2010: 214 pages; 3401048.
32.
Integrated Si3N4 Waveguide Circuits for Single- and Multi-Layer Applications
by Huffman, Taran Arthur, Ph.D.  University of California, Santa Barbara. 2018: 129 pages; 10979233.
33.
Energy Scavenging in Three Dimensional Integrated Circuits with Through Silicon Vias
by Minvielle, Robert, Ph.D.  University of Louisiana at Lafayette. 2013: 132 pages; 3615292.
34.
Millimeter-wave CMOS power amplifiers design
by Bohsali, Mounir Youssef, Ph.D.  University of California, Berkeley. 2008: 165 pages; 3353454.
35.
Design of digital-centric polar modulation transmitters for high-data-rate communications
by Syllaios, Ioannis Loukas, Ph.D.  The University of Texas at Dallas. 2010: 126 pages; 3415466.
36.
Design Considerations for Nano-Electromechanical Relay Circuits
by Spencer, Matthew Edmund, Ph.D.  University of California, Berkeley. 2015: 102 pages; 3733438.
37.
SRAM reliability improvement using ECC and circuit techniques
by McCartney, Mark P., Ph.D.  Carnegie Mellon University. 2014: 131 pages; 3733956.
38.
A Hybrid CMOS Image Sensor with Energy Harvesting Capability
by Pour, Golsa Moayeri, Ph.D.  Purdue University. 2015: 139 pages; 3734524.
39.
IIIV/Si Nanoscale Lasers and Their Integration with Silicon Photonics
by Bondarenko, Olesya, Ph.D.  University of California, San Diego. 2015: 136 pages; 3687359.
40.
Improving the Readout of Semiconducting Qubits
by Curry, Matthew Jon, Ph.D.  The University of New Mexico. 2019: 195 pages; 13857960.
41.
Scalable Quantum Light Sources in Silicon Photonic Circuits
by Gentry, Cale Michael, Ph.D.  University of Colorado at Boulder. 2018: 168 pages; 10791965.
43.
On-Chip Diagnosis of Generalized Delay Failures using Compact Fault Dictionaries
by Beckler, Matthew Layne, Ph.D.  Carnegie Mellon University. 2017: 132 pages; 10283822.
44.
Control architectures for spur-free operation in switching power regulators
by Tao, Chengwu, Ph.D.  Iowa State University. 2011: 134 pages; 3473106.
45.
Chip-Scale Lidar
by Behroozpour Baghmisheh, Behnam, Ph.D.  University of California, Berkeley. 2016: 44 pages; 10189652.
47.
Nanopower Analog Frontends for Cyber-Physical Systems
by Aono, Kenji, Ph.D.  Washington University in St. Louis. 2018: 208 pages; 13425251.
48.
Photonic Links: From Theory to Automated Design
by Settaluri, Krishna Tej, Ph.D.  University of California, Berkeley. 2018: 120 pages; 13423776.
49.
Power and thermal modeling for the proto-VIPRAM chip
by Xia, Wenbo, M.S.  Southern Methodist University. 2014: 113 pages; 1569659.
50.
Implementation of UART with BIST technique in FPGA
by Pradhan, Suyash, M.S.  California State University, Long Beach. 2016: 50 pages; 10111201.
51.
Research and design on phase-locked loop and equalizer for wireline communications
by You, Yang, Ph.D.  Southern Methodist University. 2015: 170 pages; 3702841.
52.
Development, Optimization, and Integration of Inline Phase-Change Switches for Reconfigurable RF Systems
by El-Hinnawy, Nabil A., Ph.D.  Carnegie Mellon University. 2018: 119 pages; 10817464.
53.
Design of Front End Circuits for a Low Power Ultra Wide Band Receiver
by Shaker, Mohamed, Ph.D.  University of Louisiana at Lafayette. 2015: 85 pages; 3714137.
54.
An 8-PSK super regenerative receiver: Design and simulation
by Subbarao, Sanjay, M.S.  California State University, Long Beach. 2015: 83 pages; 1596992.
55.
Design considerations for high-speed backplane transceivers with digital adaptive equalizers
by Chung, Hayun Cecillia, Ph.D.  Harvard University. 2009: 125 pages; 3385565.
56.
Side channel attack resistance: Migrating towards high level methods
by Borowczak, Mike, Ph.D.  University of Cincinnati. 2013: 183 pages; 3601397.
57.
Dynamic Load-Based Power and Clock Gating Techniques for High-Speed Digital Circuits
by Farah, Salim, Ph.D.  University of Louisiana at Lafayette. 2014: 128 pages; 3622218.
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