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1.
Toward a Hardware Accelerated Future
by Lyons, Michael John, Ph.D.  Harvard University. 2013: 162 pages; 3600206.
2.
Architectures for cryptography accelerators
by Cohen, Aaron Ethan, Ph.D.  University of Minnesota. 2007: 199 pages; 3277590.
3.
Hardware Acceleration to Address the Costs of Data Movement
by Valavi, Hossein, Ph.D.  Princeton University. 2020: 254 pages; 27548046.
5.
Acceleration of Compute-Intensive Applications on Field Programmable Gate Arrays
by Rodríguez Borbón, Jose Milet , Ph.D.  University of California, Riverside. 2020: 161 pages; 27742586.
6.
Opportunities for near data computing in MapReduce workloads
by Pugsley, Seth Hintze, Ph.D.  The University of Utah. 2015: 98 pages; 3704952.
7.
Hardware acceleration of database applications
by Moussalli, Roger, Ph.D.  University of California, Riverside. 2013: 193 pages; 3559997.
8.
Flexible Architectures for Enhanced Security
by Chang, Jed Kao-Tung, Ph.D.  University of California, Irvine. 2012: 149 pages; 3518799.
9.
Enabling User Space Secure Hardware
by Coughlin, Aimee, Ph.D.  University of Colorado at Boulder. 2018: 137 pages; 10791863.
10.
Moment-Based Accelerators for Kinetic Problems with Application to Inertial Confinement Fusion
by Taitano, William Tsubasa-Tsutsui, Ph.D.  The University of New Mexico. 2014: 280 pages; 3630377.
11.
The Hybrid Task Graph Scheduler
by Blattner, Timothy, Ph.D.  University of Maryland, Baltimore County. 2016: 152 pages; 10245475.
12.
A Mixed Method Study of the Accelerators and Decelerators of Global Hybrid Team Effectiveness
by Schroeder, Katherine Anne, Ph.D.  Benedictine University. 2013: 299 pages; 3569136.
13.
Design and architecture of automatically-generated energy-reducing coprocessors
by Sampson, John Morgan, Ph.D.  University of California, San Diego. 2010: 119 pages; 3422889.
14.
Acceleration of streaming applications on FPGAs from high level constructs
by Mitra, Abhishek, Ph.D.  University of California, Riverside. 2008: 192 pages; 3341851.
15.
Productive Design of Extensible On-Chip Memory Hierarchies
by Cook, Henry Michael, Ph.D.  University of California, Berkeley. 2016: 153 pages; 10150942.
16.
Decoupled Vector-Fetch Architecture with a Scalarizing Compiler
by Lee, Yunsup, Ph.D.  University of California, Berkeley. 2016: 157 pages; 10151006.
17.
Antikernel: A decentralized secure hardware-software operating system architecture
by Zonenberg, Andrew D., Ph.D.  Rensselaer Polytechnic Institute. 2015: 148 pages; 3705663.
20.
Algorithms and hardware designs for decimal multiplication
by Erle, Mark A., Ph.D.  Lehigh University. 2009: 229 pages; 3344791.
21.
Injection and Plasma Waveguides for Multi-stage Laser Plasma Acceleration
by Swanson, Kelly, Ph.D.  University of California, Berkeley. 2019: 161 pages; 13886045.
22.
Unlocking Design Reuse with Hardware Compiler Frameworks
by Izraelevitz, Adam, Ph.D.  University of California, Berkeley. 2019: 150 pages; 27663969.
23.
Hardware-Assisted Protection and Isolation
by Wang, Jiang, Ph.D.  George Mason University. 2011: 126 pages; 3471624.
24.
Hardware Support for Productive Partitioned Global Address Space (PGAS) Programming
by Serres, Olivier, Ph.D.  The George Washington University. 2016: 122 pages; 3746724.
25.
Haptic hardware: Evaluation, design and placement
by Salisbury, Curt M., Ph.D.  Stanford University. 2009: 126 pages; 3382949.
26.
Hardware Transactional Memory: A Systems Perspective
by Rossbach, Christopher John, Ph.D.  The University of Texas at Austin. 2009: 204 pages; 3434949.
27.
Toward hardware-oriented defensive network infrastructure
by Chen, Hao, Ph.D.  State University of New York at Binghamton. 2015: 194 pages; 3713553.
28.
Monitoring Particulate Matter with Commodity Hardware
by Holstius, David, Ph.D.  University of California, Berkeley. 2014: 116 pages; 3640465.
29.
KMux: Kernel Extension At The Hardware Interface
by Hossain, Tareque, M.S.  The George Washington University. 2011: 54 pages; 1492034.
30.
Hardware/Software Co-Design via Specification Refinement
by Peck, Wesley G., Ph.D.  University of Kansas. 2011: 183 pages; 3489442.
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