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1.
Reliability-Aware Placement and Routing for FPGAs
by Abdul-Aziz, Mohammed A., M.S.  Northeastern University. 2010: 94 pages; 1489294.
2.
Acceleration of streaming applications on FPGAs from high level constructs
by Mitra, Abhishek, Ph.D.  University of California, Riverside. 2008: 192 pages; 3341851.
3.
Design and Verification of a DFI-AXI DDR4 Memory PHY Bridge Suitable for FPGA Based RTL Emulation and Prototyping
by Mayekar, Pallavi Avinash, M.S.  Rochester Institute of Technology. 2019: 122 pages; 22615759.
4.
Duck Hunt FPGA game, a project on UML and digital design
by Nguyen, Vuong D., M.S.  California State University, Long Beach. 2016: 65 pages; 10137441.
5.
Toward a Hardware Accelerated Future
by Lyons, Michael John, Ph.D.  Harvard University. 2013: 162 pages; 3600206.
6.
Implementation of UART with BIST technique in FPGA
by Pradhan, Suyash, M.S.  California State University, Long Beach. 2016: 50 pages; 10111201.
7.
Gender detection from hand signatures using MyRIO FPGA
by Ratnakar, Aniket, M.S.  California State University, Long Beach. 2015: 63 pages; 1597787.
8.
FPGA implementation of self testing USART
by Rana, Vireshsingh, M.S./M.P.H.  California State University, Long Beach. 2016: 37 pages; 10141518.
9.
10.
Golf game utilizing a FPGA and a VGA display
by Davis, Robert R., M.S.  California State University, Long Beach. 2016: 95 pages; 10144829.
11.
Experiments on the vibration control of a flexible structure using FPGA
by Chaudhari, Devendra, M.S.  California State University, Long Beach. 2016: 47 pages; 10014956.
12.
Pipelined IEEE-754 Double Precision Floating Point Arithmetic Operators on Virtex FPGA's
by Pathanjali, Nandini, M.S.  University of Cincinnati. 2002: 110 pages; 10857176.
13.
Fault-tolerant FPGA-based multi-processor systems for nano-satellites
by Venkataraman, Shyamsunda, M.Eng.  National University of Singapore (Singapore). 2015: 94 pages; 10006079.
14.
Implementation and evaluation of a double-adjacent error correcting code in an FPGA
by Malley, Brian J., M.S.  California State University, Long Beach. 2016: 80 pages; 10196051.
15.
FPGA implementation of Rajendra Kumar's adaptive receiver for higher order modulated signal over fading channel
by Bhagavatula, Falgun, M.S.  California State University, Long Beach. 2016: 44 pages; 10142980.
16.
Enabling User Space Secure Hardware
by Coughlin, Aimee, Ph.D.  University of Colorado at Boulder. 2018: 137 pages; 10791863.
17.
HDMI frame grabber
by Gu, Xun, M.S.  California State University, Long Beach. 2014: 110 pages; 1526915.
18.
Reliability-Aware CAD Tools for SRAM-Based FPGAs
by Golshan, Shahin, Ph.D.  University of California, Irvine. 2011: 148 pages; 3481525.
19.
Application hardware-software co-design for reconfigurable computing systems
by Saha, Proshanta, Ph.D.  The George Washington University. 2008: 151 pages; 3297468.
20.
Reconfigurable computing: Power consumption optimization in embedded systems
by Varadarajan, Srihari, M.S.  California State University, Long Beach. 2014: 78 pages; 1569997.
21.
Integrated hardware/software approaches to software security for embedded systems
by Gelbart, Olga, D.Sc.  The George Washington University. 2008: 137 pages; 3297440.
22.
A Smart Design Framework for a Novel Reconfigurable Multi-Processor Systems-on-Chip (ASREM) Architecture
by Dutta, Anandi, Ph.D.  University of Louisiana at Lafayette. 2016: 127 pages; 10163349.
23.
An optimized modified booth recoder for efficient design of the add-multiply operator
by Mehta, Kunal, M.S.  California State University, Long Beach. 2015: 35 pages; 1603343.
24.
Hardware acceleration of database applications
by Moussalli, Roger, Ph.D.  University of California, Riverside. 2013: 193 pages; 3559997.
25.
System on chip: Two design paths explained
by Tamayo, Jose, M.S.  California State University, Long Beach. 2012: 99 pages; 1520930.
27.
Fast modular exponentiation using residue domain representation: A hardware implementation and analysis
by Nguyen, Christopher Dinh, M.S.  University of Maryland, Baltimore County. 2013: 129 pages; 1551346.
28.
An Investigation of an Open-IP Linux Architecture
by Edmiston, Christopher C., M.S.  Southern Illinois University at Edwardsville. 2014: 68 pages; 1568355.
30.
Modifications to a Cavity Ringdown Spectrometer to Improve Data Acquisition Rates
by Bostrom, Gregory Alan, Ph.D.  Portland State University. 2015: 120 pages; 3687620.
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