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1.
Using locality and interleaving information to improve shared cache performance
by Liu, Wanli, Ph.D.  University of Maryland, College Park. 2009: 140 pages; 3359458.
2.
Intelligent cache management techniques for reducing memory systemwaste
by Khan, Samira M., Ph.D.  The University of Texas at San Antonio. 2012: 109 pages; 3527415.
4.
Enhanced Secondary Bus Microarchitecture
by O'Farrell, John William, Ph.D.  Auburn University. 2011: 96 pages; 3480707.
5.
Architecting emerging memory technologies for energy-efficient computing in modern processors
by Jianxing, Wang, Ph.D.  National University of Singapore (Singapore). 2015: 161 pages; 10006096.
6.
Polymorphic chip multiprocessor architecture
by Solomatnikov, Alexandre, Ph.D.  Stanford University. 2009: 167 pages; 3343960.
7.
Low Power Techniques for Video Codec Motion Compensation
by Badran-Louca, Serena, Ph.D.  North Carolina State University. 2015: 74 pages; 3710728.
8.
Domical: A new cooperative caching framework for streaming media in wireless home networks
by Shayandeh, Shahin, Ph.D.  University of Southern California. 2010: 125 pages; 3403757.
9.
Simulation and characterization of inter-process interference on multithreaded and multicore architectures
by Kihm, Joshua Lee, Ph.D.  University of Colorado at Boulder. 2008: 309 pages; 3315818.
10.
Detection of malware via side channel information
by Quinn, Rian, Ph.D.  State University of New York at Binghamton. 2012: 169 pages; 3522519.
11.
Smart memories: A reconfigurable memory system architecture
by Firoozshahian, Amin, Ph.D.  Stanford University. 2009: 196 pages; 3343953.
12.
Filtered bank associative TLB with victim buffering for reduced access to main TLB and power optimization
by Castle, Michael, M.S.  California State University, Long Beach. 2011: 108 pages; 1499238.
13.
Productive Design of Extensible On-Chip Memory Hierarchies
by Cook, Henry Michael, Ph.D.  University of California, Berkeley. 2016: 153 pages; 10150942.
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15.
Using Satellite Images In Monitoring Wetland Changes In The Cache River Basin In Illinois, USA, Between 1987 And 2014
by Onothoja, Uyoyoghene Tina, M.S.  Southern Illinois University at Edwardsville. 2016: 100 pages; 10160633.
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17.
Late to Terminal Classic transition at Lamanai with implications for the Postclassic
by Pierce, Karen L., M.A.  University of Colorado at Denver. 2016: 479 pages; 10149341.
18.
Hardware Transactional Memory: A Systems Perspective
by Rossbach, Christopher John, Ph.D.  The University of Texas at Austin. 2009: 204 pages; 3434949.
19.
Architecture and performance evaluation of data storage systems
by Ren, Jin, Ph.D.  University of Rhode Island. 2011: 186 pages; 3449275.
20.
Directory Storage Efficiency Improvement for Chip-Multiprocessors
by Shu, Wei, Ph.D.  University of Louisiana at Lafayette. 2018: 120 pages; 13420085.
21.
Architectural support for efficient on-chip parallel execution
by Brown, Jeffery Alan, Ph.D.  University of California, San Diego. 2010: 159 pages; 3402089.
22.
Parallelism and error reduction in a high performance environment
by Castaldo, Anthony M., Ph.D.  The University of Texas at San Antonio. 2010: 117 pages; 3433204.
23.
Performance study of web caching algorithms in a home network with video traffic
by Suh, Peter, M.S.  California State University, Long Beach. 2015: 42 pages; 1595795.
24.
GIS Spatial Analysis of Arctic Settlement Patterns: A Case Study in Northwest Alaska
by Junge, Justin Andrew, M.S.  Portland State University. 2017: 314 pages; 10600719.
25.
Integrated hardware/software approaches to software security for embedded systems
by Gelbart, Olga, D.Sc.  The George Washington University. 2008: 137 pages; 3297440.
27.
Queue Streaming Model: Theory, Algorithms, and Implementation
by Zope, Anup D., Ph.D.  Mississippi State University. 2019: 215 pages; 13860290.
28.
Constructing a Clinical Research Data Management System
by Quintero, Michael C., M.S.C.S.  University of South Florida. 2017: 47 pages; 10640886.
29.
Modeling and design of high-performance and power-efficient 3D dram architectures
by Chen, Ke, Ph.D.  University of Notre Dame. 2013: 151 pages; 3732210.
30.
Efficient ray tracing architectures
by Spjut, Josef Bo, Ph.D.  The University of Utah. 2015: 129 pages; 3727095.
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