Modern day embedded systems require frequent changes in their archirecture due to the variations in the market requirements and the environment the embedded system is placed. For example, the data traffic that is seen by the embedded system may vary in amount and regularity. The quality requirements of the output may vary also vary. The variations impose constraints which cant be efficiently obtained by a static architecture and redesigning would severly affect time to market and cost due to over designed solutions. The over design comes in because the design may be done to handle all the varied scenarios and the full capabilities of the system would rarely be used. In a mobile computing/communication system power requirements are tantamount and there are number of schemes that used to control the voltage levels or alertness of these devices. There has been substantial work done in power conservation with the help of various control methods. We would like to extend some of these control methods to the problem of controlling reconfigurable architectures in a dynamically varying environment.
The control methods started off with using discrete time models and then evolved to continuous time models for embedded systems. The continuous time methods have proven to give realistic representation of the dynamics of the system as compared to discrete time models. Another classification of the control methods can be done with respect to the deterministic and stochastic control frameworks. Deterministic control has been the classical approach used by engineers and computer scientists to device control methods due to the fact that most embedded systems are still synchronous and events occur at integral multiples of clock periods. The trend toward using continuous time methods has come about due to asynchronous operation and the fact that though the tasks may have discrete execution time values the values may exist over a large range and may follow a distribution in terms of their frequency of occurrence. Which led us to the usage of continuous time stochastic modeling for the embedded systems.
The control framework we use is based on CTMDP (Continuous Time Markov Decision Processes). These are a class of Dynamic Programming methods which implement stochastic control policies. These methods have been used for dynamic scheduling, load sharing and inventory control among other engineering and econometric problems. The beauty of these methods is that a queueing model of an architecture can be easily mapped to CTMDP framework. With appropriate rewards and constraints incorporated from the specifications of the application these methods throw the design problem as linear programming problem. We have studied cases where the problem may not be linear and methods have been developed so that the problem could be linearised.
The thesis aims at identifying the need of reconfigurability in different architectures and different applications. Such a study was necessary in order to systematically study the different design requirements and appropriate modifications in the control method. The embeddede architectures have beem broadly split into 3 subsystems by us, they are (1) the communication sub-system (2) the processing sub-system and (3) the memory sub-system. Untill now we have concentrated on the communication and processing subsystems. Designing the communication sub-system involved bus arbitration policies for synthesized bus architectures for real world applications. The stochastic arbitration policies were tested with other heuristics in a queueing model based simulation of the embedded architecture. They were compared on the basis on several performance metrics like buffer size, data loss, power conservation and delay. A design environment was developed in which the policies were sequentially used on a queueing model of the architecture and systematic data collection can be done and results can be plotted and analysed.
Experiments were performed for small test architectures as well as complex architectures for real world applications. The experiments were performed for a Hitachi SH DSP and an IBM Network processor. The synthesized bus architectures could be classified as architectures with and without redundant paths between processors as well as architectures with and without hierarchy. In terms of bus architectures hierarchy pertains to the existence of bridges that facilitate bus to bus communication instead of bus to processor environment. This introduction of bridges causes a master slave kind of environment which leads to a non linear problem definition making the problem intractable in the current frame work. One of the promising solutions to this problem seems to be to split the system into sections that could be modeled as a linear problem and then stitch the components together at higher hierarchical level.
In the processing sub-system experiments we initially tried a separate style of modeling in which the workloads were characterized by empirical curves obtained from the design specification required by the physical phenomenon being tracked. (Abstract shortened by UMI.)
|School:||State University of New York at Stony Brook|
|School Location:||United States -- New York|
|Source:||DAI-B 69/10, Dissertation Abstracts International|
|Subjects:||Electrical engineering, Operations research, Computer science|
|Keywords:||Bus arbitration, Computer architecture, Embedded systems, Hardware performance, M.D.P., Queues|
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