As the semiconductor industry continues scaling devices to smaller sizes, the need for next generation lithography technology for fabricating these small structures has always been at the forefront. Over the past few years, conventional optical lithography technology which has adopted a series of resolution enhancement techniques to support the scaling needs is expected to run out of steam in the near future. Extreme Ultra Violet lithography (EUVL) is being actively pursued by the semiconductor industry as one of the most promising next generation lithographic technologies. Most of the issues unique to EUVL arise from the use of 13.5 nm light for imaging. Since most material systems are absorbing at that wavelength, the entire optical train in a EUVL tool is reflective. Due to the use of reflective optics, reticle illumination is non-telecentric leading to change in feature size from shadowing, image placement errors from reticle non-flatness, etc. All of these challenges and problems need to be overcome for the technology to come into use in production. In this work, Image Placement Errors (IPE) arising from reticle non-flatness has been studied.
In order to overcome reticle non-flatness induced image placement errors, flatness compensation has been proposed to relax requirements for substrate flatness. With flatness compensation, theoretically, substrates with any shape can be used as long as the resulting image placement errors from the substrate shape is understood. Preliminary overlay results from flatness compensation experiments using the EUV Alpha Demo Tool (ADT) has shown ∼35% improvement in overlay error using different flatness compensation algorithms. To better understand the different components of image placement error and to characterize the reticle clamping on the EUV ADT, a set of reticles were fabricated from substrates with different flatness specifications to be imaged on the ASML EUV Alpha Demo Tool. Each reticle was designed with a set of image placement fiducials, which can be imaged on to a wafer and measured to calculate the IPE. Some of these reticles were made 90° rotatable, such that the reticle and tool contribution to IPE can be separated. Finally, a overlay study with a set of 20 blanks with different shapes was performed to understand the feasibility of reticle shape matching as a method for overlay reduction in EUVL.
|Advisor:||Hartley, John G.|
|Commitee:||Denbeaux, Gregory P., Hartley, John G., Koay, Chiew-seng, Levine, Ernest N., Wood, Obert R.|
|School:||State University of New York at Albany|
|Department:||Nanoscale Science and Engineering-Nanoscale Engineering|
|School Location:||United States -- New York|
|Source:||DAI-B 71/05, Dissertation Abstracts International|
|Subjects:||Electrical engineering, Nanotechnology, Systems science|
|Keywords:||Extreme ultraviolet lithography, Flatness, Image placement error, Lithography, Overlays, Reticle nonflatness|
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