Onboard computing demands for space missions are continually increasing due to the need for real-time sensor and autonomous processing combined with limited communication bandwidth to ground stations. However, creating space-grade processors that can operate reliably in environments that are highly susceptible to radiation hazards is a lengthy, complex, and costly process, resulting in limited processor options for space missions. Therefore, research is conducted into current, upcoming, and potential future space-grade processors to provide critical insights for progressively more advanced architectures that can better meet the increasing demands for onboard computing. Metrics and benchmarking data are generated and analyzed for various processors in terms of performance, power efficiency, memory bandwidth, and input/output bandwidth.
Metrics are used to measure and compare the theoretical capabilities of a broad range of processors. Results demonstrate how onboard computing capabilities are increasing due to processors with architectures that support high levels of parallelism in terms of computational units, internal memories, and input/output resources; and how performance varies between applications, depending on the intensive computations used. Furthermore, the overheads incurred by radiation hardening are quantified and used to analyze low-power commercial processors for potential use as future spacegrade processors.
Once the top-performing processors are identified using metrics, benchmarking is used to measure and compare their realizable capabilities. Computational dwarfs are established and a taxonomy is formulated to characterize the space-computing domain and identify computations for benchmark development, optimization, and testing. Results demonstrate how to optimize for the architectures of space-grade processors and how they compare to one another for a variety of integer and floating-point computations.
Metrics and benchmarking results and analysis thus provide critical insights for progressively more advanced architectures for space-grade processors that can better meet the increasing onboard computing demands of space missions. Trade-offs between architectures are determined that can be considered when deciding which space-grade processors are best suited for specific space missions or which characteristics and features are most desirable for future space-grade processors.
|Commitee:||George, Alan, Gordon-Ross, Ann, Lam, Herman, Telesco, Charles|
|School:||University of Florida|
|Department:||Electrical and Computer Engineering|
|School Location:||United States -- Florida|
|Source:||DAI-B 80/07/(E), Dissertation Abstracts International|
|Subjects:||Computer Engineering, Electrical engineering, Computer science|
|Keywords:||Architecture, Benchmark, CPU, FPGA, Hardened, Metric|
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