Dissertation/Thesis Abstract

Multi-Port Automation for SRAM Compiler Design
by Grimes, Michael T., M.S., University of California, Santa Cruz, 2018, 42; 13423318
Abstract (Summary)

Memory compilers are useful in computer system design as they automate layout, netlists, and characterization of a memory. This thesis presents a multi-ported SRAM scheme for the open-source SRAM compiler OpenRAM. This multi-ported SRAM design has access ports configurable to read and write, write-only, or read-only and supports any number of ports in any combination. I designed layout automation for an array of these bit cells in a generic 45 nm process and fabricable 180nm SCMOS. I designed netlist automation for the entire memory system for any combination of ports. A functional test I've designed automates SPICE simulations on the top level netlist to verify any port configuration.

Indexing (document details)
Advisor: Guthaus, Matthew
Commitee: Beamer, Scott, Guthaus, Matthew, Renau, Jose
School: University of California, Santa Cruz
Department: Computer Engineering
School Location: United States -- California
Source: MAI 58/04M(E), Masters Abstracts International
Subjects: Computer Engineering, Engineering
Keywords: Memory, SRAM
Publication Number: 13423318
ISBN: 978-0-438-85385-0
Copyright © 2020 ProQuest LLC. All rights reserved. Terms and Conditions Privacy Policy Cookie Policy