With PQDT Open, you can read the full text of open access dissertations and theses free of charge.
About PQDT Open
Search
Dissertation/Thesis Abstract
-
Other Available Formats:
-
Full Text - PDF
(2.28 MB)
A fast-acquisition all-digital delay-locked loop using a starting-bit prediction algorithm for the successiveapproximation register
by Sachdeva, Arjun, M.S., California State University, Long Beach, 2016, 46; 10252211
Abstract (Summary)
This project report presents a fast-acquisition all-digital delay-locked loop (ADDLL) using a starting-bit prediction algorithm for the successive-approximation register (SBP-SAR). The SBP effectively eliminates the harmonic lock and the false lock. The ADDLL design allows wide clock frequency range operation. The algorithm and the digital circuit are digitally simulated and the performance and the advantage over the Conventional-SAR are shown.
| Advisor: | Wagdy, Mahmoud |
| Commitee: | Mozumdar, Mohammad, Wagdy, Mahmoud, Yeh, Henry |
| School: | California State University, Long Beach |
| Department: | Electrical Engineering |
| School Location: | United States -- California |
| Source: | MAI 56/03M(E), Masters Abstracts International |
| Source Type: | DISSERTATION |
| Subjects: | Electrical engineering |
| Keywords: | |
| Publication Number: | 10252211 |
| ISBN: | 978-1-369-51197-0 |
Copyright © 2021 ProQuest LLC. All rights reserved.
Terms and Conditions
Privacy Policy
Cookie Policy
