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Dissertation/Thesis Abstract

A study and implementation of ternary based weighted analog-to-digital converters
by Gonsalez, David B., M.S., California State University, Long Beach, 2016, 48; 10239822
Abstract (Summary)

This project defines the benefits of using the ternary numerical system as the weighted values in the capacitor array of a switched capacitor Analog-to-Digital Converter (ADC). A ternary digit or trit, contains log2 3 ≅ 1.58 bits of information. To achieve the digital range of an N-Bit system requires log3 2 ≅ 0.63 trits. The development of this project requires a union between the analog and digital architecture. This was accomplished using Spice simulation software, which supports the mixed signal analysis. The digital architecture written in VHSIC Hardware Description Language (VHDL) is the logical component of the system. The test results analyzed in MATLAB confirm a higher Signal to Noise Ratio (SNR) per comparable trit to bit, comparable Total Harmonic Distortion (THD) level to the Binary System, Differential Nonlinearity (DNL) with more room for capacitor mismatch error.

Indexing (document details)
Advisor: Khoo, I-Hung
Commitee: Ary, James, Chassiakos, Anastasios
School: California State University, Long Beach
Department: Electrical Engineering
School Location: United States -- California
Source: MAI 56/02M(E), Masters Abstracts International
Subjects: Electrical engineering
Keywords: Analog to digital converters, Switched capacitors, Ternary system
Publication Number: 10239822
ISBN: 978-1-369-37507-7
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