This project defines the benefits of using the ternary numerical system as the weighted values in the capacitor array of a switched capacitor Analog-to-Digital Converter (ADC). A ternary digit or trit, contains log2 3 ≅ 1.58 bits of information. To achieve the digital range of an N-Bit system requires log3 2 ≅ 0.63 trits. The development of this project requires a union between the analog and digital architecture. This was accomplished using Spice simulation software, which supports the mixed signal analysis. The digital architecture written in VHSIC Hardware Description Language (VHDL) is the logical component of the system. The test results analyzed in MATLAB confirm a higher Signal to Noise Ratio (SNR) per comparable trit to bit, comparable Total Harmonic Distortion (THD) level to the Binary System, Differential Nonlinearity (DNL) with more room for capacitor mismatch error.
|Commitee:||Ary, James, Chassiakos, Anastasios|
|School:||California State University, Long Beach|
|School Location:||United States -- California|
|Source:||MAI 56/02M(E), Masters Abstracts International|
|Keywords:||Analog to digital converters, Switched capacitors, Ternary system|
Copyright in each Dissertation and Thesis is retained by the author. All Rights Reserved
The supplemental file or files you are about to download were provided to ProQuest by the author as part of a
dissertation or thesis. The supplemental files are provided "AS IS" without warranty. ProQuest is not responsible for the
content, format or impact on the supplemental file(s) on our system. in some cases, the file type may be unknown or
may be a .exe file. We recommend caution as you open such files.
Copyright of the original materials contained in the supplemental file is retained by the author and your access to the
supplemental files is subject to the ProQuest Terms and Conditions of use.
Depending on the size of the file(s) you are downloading, the system may take some time to download them. Please be