Rapid developments in the communications field have created a rising demand for low power, high speed, and low weight communication devices. The current project presents the development of a Viterbi decoder on a chip with a reduced dynamic power consumption, achieved by using an asynchronous design, which is data driven and active only when needed. The Xpower analyzer tool is used to measure the dynamic power on the designed chip, from which it is seen that the proposed design greatly improves power consumption. The results also show that there is a trade-off between dynamic power reduction, larger chip area, and reduced speed.
|Commitee:||Ary, James, Khoo, I-Hung|
|School:||California State University, Long Beach|
|School Location:||United States -- California|
|Source:||MAI 55/06M(E), Masters Abstracts International|
|Keywords:||Asynchronous, Low power, Viterbi decoder|
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