Quantum-dot Cellular Automata (QCA) are proposed models of quantum computation, which are articulated in analogy to Von Neumann's conventional models of cellular automata. These models are worthy for the architecture of ultra-dense low-power and high-performance digital circuits. Efficient solutions have recently been proposed for several arithmetic circuits, such as adders, multipliers, and comparators. Since the design of digital circuits in QCA still poses several challenges, novel implementation strategies and methodologies are highly desirable. This project demonstrates a new design approach oriented to the implementation of binary comparators using QCA. This strategy is implemented for designing various architectures of binary comparator. With respect to existing counterparts, the comparators proposed here exhibit significantly higher speed and reduced overall area.
|Commitee:||Ary, James, Tran, Boi|
|School:||California State University, Long Beach|
|School Location:||United States -- California|
|Source:||MAI 55/05M(E), Masters Abstracts International|
|Keywords:||Quantum-dot Cellular Automata|
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