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A multiprecision multiplier blends variable precision, parallel processing, dynamic voltage scaling and operand arrangement techniques to give improved performance over a wide range of operating conditions. The sub-blocks of the multiplier can function either as low precision multipliers when separated or as high precision multipliers when integrated.
A dynamic voltage and frequency management unit influences the operation of the multiplier by adjusting the voltage and frequency so that the multiplier works with improved accuracy. The razor flip-flops along with the voltage dithering unit adjust themselves to the real world run-time of the load and increase the performance of the multiplier to obtain the least power usage. This combination decreases the error margins for voltage safety. Furthermore, the operand scheduler organizes the inputs, which helps the entire system in achieving improved voltage and frequency values, decreasing power consumption. This process iterates until power consumption can not be further reduced.
Advisor: | Chassiakos, Anastasios |
Commitee: | Ary, James, Khoo, I-Hung |
School: | California State University, Long Beach |
Department: | Electrical Engineering |
School Location: | United States -- California |
Source: | MAI 55/05M(E), Masters Abstracts International |
Source Type: | DISSERTATION |
Subjects: | Electrical engineering |
Keywords: | |
Publication Number: | 10111181 |
ISBN: | 978-1-339-74391-2 |