The current project presents a carry-skip adder (CSKA) which has a higher speed and lower energy consumption when compared with conventional-CSKA structure. The speed improvement is attained by implementing concatenation and incrementation techniques to enhance the effectiveness of the conventional structure. The proposed structure uses AND-OR-Invert (AOI) and OR-AND-Invert (OAI) compound gates for the skip logic rather than the multiplexer logic, and it can be implemented either with fixed stage size or variable stage size methods. A hybrid variable-latency CSKA structure with a parallel prefix adder at the middle stage is proposed, where the parallel prefix network is constructed using a speculative Han-Carlson adder. The proposed structure with Han-Carlson parallel prefix adder is evaluated by comparing its delay parameter with those of other adders. Simulation results show that the proposed structure achieves an average 30-45% improvement in the delay, as compared to conventional-CSKA structure.
|Commitee:||Ary, James, Mozumdar, Mohammad|
|School:||California State University, Long Beach|
|School Location:||United States -- California|
|Source:||MAI 55/03M(E), Masters Abstracts International|
|Keywords:||Adder, Han-Carlson, High-speed, Prefix, Skip, Speculative|
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