With the scaling of silicon technology, multi-processor Systems-on-Chip (MPSoC) are moving towards many-core structures with distributed architecture where a number of processing cores with memory are interconnected by a high-speed on chip communication network to support advanced computing trends such as tera scale computing. Due to the stringent performance and power limitation, the state-of-the-art shared bus and point-to-point connections have been shown unable to supply nano scale MPSoCs (where hundreds or even thousands of cores are embedded) with both sufficient bandwidth and low latency. Network-on-Chips (NoCs) are emerging as an alternative communication platform for complex MPSoCs. In this work, we presents three novel WiNoC architectures based on UWB technology. We provide comprehensive designs, which includes Medium Access Control layer, Network layer, and modeling scheme. The implementation includes the lossless MAC, deadlock free routing algorithm, and unique simulator. Our work does not just include the pure WiNoC but also hybrid architecture. The results provides new architecture directions for wireless network on chip.
|Commitee:||Bayoumi, Magdy, Tzeng, Nian-Feng|
|School:||University of Louisiana at Lafayette|
|School Location:||United States -- Louisiana|
|Source:||DAI-B 75/10(E), Dissertation Abstracts International|
|Keywords:||Hybrid meshes, Network-on-chip, Ultrawideband, Wireless networks|
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